1. Field of the Invention
The present invention relates to a solid-state image pickup apparatus, and more particularly to a solid-state image pickup apparatus adapted for use in a digital camera, a video camera, a copying apparatus, a facsimile apparatus and the like.
2. Related Background Art
An image sensor, formed by a one-dimensional or two-dimensional array of solid-state image pickup devices including photoelectric converting elements, is frequently employed in a digital camera, a video camera, a copying apparatus, a facsimile apparatus and the like. The solid-state image pickup device includes, for example, a CCD image pickup device and an amplifying solid-state image pickup device.
Recent trend in such image pickup device is toward a larger number of pixels, and a resulting decrease in the area of each pixel leads also to a decrease in the area of each photodiode. It is therefore required to handle a signal charge of a smaller amount.
FIG. 13 shows a circuit configuration of an amplifying solid-state image pickup device. In an amplifying solid-state image pickup device, a photodiode PD is provided in a unit pixel, as shown in FIG. 14. Plural transistors for reading a photosignal accumulated in the photodiode and an amplifying transistor constitute a readout circuit in a pixel.
Also in a readout circuit in a pixel shown in FIG. 3, plural transistors for reading a photosignal accumulated in a photodiode and an amplifying transistor constitute a readout circuit for two photodiodes. This circuit is to secure an area of the photodiode within a unit pixel, thereby achieving a high S/N ratio together with an increase in the number of pixels.
Also FIG. 15 shows a circuit configuration for an amplifying solid-state image pickup device in case of employing the pixel circuit configuration of FIG. 3. A basic readout operation is same in FIG. 13 and in FIG. 15. More specifically, a vertical scanning register (VSR) controls a signal readout of the pixels to a pixel row and a resetting operation, and a readout signal is accumulated in a capacitance C. The signals are outputted by a horizontal scanning register (HSR) in succession for each pixel row.
As described in Japanese Patent Application Laid-Open No. 2003-258229, FIG. 16 shows a cross-sectional structure of a photodiode in a unit pixel in an amplifying MOS sensor shown in FIG. 13. Also FIG. 17 is a plan view of a unit pixel in the CMOS sensor shown in FIG. 14.
As shown in FIG. 16, an n-type area 1803, constituting a photodiode together with a p-semiconductor layer 1802 on an n-type substrate 1801, is formed by self-alignment with a selectively oxidized film 1804 for element isolation. This structure is to maximize the area of the n-type area 1803 corresponding to the area of the photodiode, to a limit.
Under the selectively oxidized film 1804 of element isolation structure, there are formed a source-drain area 1807 of an adjacent MOS transistor, and a channel stop area 1806 for improving a punch-through voltage to the n-type area 1803 of the photodiode. Also on the selectively oxidized film 1804 for element isolation, a gate wiring layer 1805 of a transistor is formed.
FIG. 5 is a plan view of the unit pixel shown in FIG. 3, and FIG. 1 shows a cross section of FIG. 5. Referring to FIG. 1, an n-type area 103, constituting a photodiode together with an n-semiconductor layer 102 on an n-type substrate 101, is formed by self-alignment with a selectively oxidized film 104 for element isolation. This structure is to maximize the area of the n-type area 103 corresponding to the area of the photodiode, to a limit.
Under the selectively oxidized film 104 for element isolation, there are formed a source-drain area 107 of an adjacent MOS transistor, and a channel stop area 106 for improving a punch-through voltage to the n-type area 103 of the photodiode. Also on the selectively oxidized film 104 for element isolation, a gate wiring layer 105 for a transistor is formed.
In FIG. 16 (or FIG. 1), however, when a high-level potential (for example +5 V) is applied to the gate wiring layer 1805 (105) of the transistor, an effective concentration is lowered in the p-type channel stop area thereunder. Therefore, a minority carrier concentration increases in a lower part of the selectively oxidized film 1804 (104).
Such minority carriers (electrons) diffuse into the photodiode to result in a drawback of an increased dark current of the photodiode.
As a countermeasure against such phenomenon, it is conceivable to increase the concentration in the p-type channel stop area 1806 (106), but such measure results in a drawback of a lowered junction breakdown voltage to the adjacent n++ source-drain area 1807 (107) or an increased leak current through the junction.
Also it is conceivable to increase a thickness of the selectively oxidized film 1804 (104) for element isolation, formed by a selective oxidation, but, in such case, the wiring layer 1805 (105) shows a drawback of an increased step difference, which is unsuitable for forming fine wirings and tends to cause a breakage or a shortcircuiting of wirings.
Thus, an increase in the dark current may lead to an increase in noises and a deterioration of S/N ratio.
In Particular problems arise in a semiconductor solid-state image pickup device as shown in FIG. 15, utilizing a pixel configuration shown in FIG. 3. In such device, there is constructed, for two photodiodes, a readout circuit by plural transistors Tr for reading photosignals accumulated in the photodiodes and an amplifying transistor. Therefore, because of an asymmetry in the arrangements of readout circuits for the photodiodes, different dark currents flow into the photodiodes of n-th row and (n+1)th row, thus resulting a drawback of different S/N ratios between the rows.